Synopsys Launches High-Performance 40G UCIe Solution To Accelerate Multi-Die AI Systems

Synopsys just propelled UCIe even further, with the launch of its own IP solution operating at up to 40 Gbps per pin, which results in 25% higher bandwidth than the current UCIe spec. The Synsopsys 40G UCIe IP affords up to 12.9Tbps per mm of data to efficiently travel between heterogeneous and/or homogeneous chiplet dies, with minimal silicon footprint. Higher bandwidth between chiplets is critical for enabling next-generation processor designs, and advanced AI and automotive ADAS systems, which must move massive amounts of data. Of note is that, despite its higher performance, Synopsys’ IP remains compliant with the UCIe 2.0 specification. Synopsys’ 40G UCIe IP solution consists of controller, PHY, and verification technology, with integrated signal integrity monitors (SIMs) and testability features to simplify bring-up and debugging, and ultimately improve reliability.